Design of Advanced Peripheral Bus for Universal Asynchronous Receiver-Transmitter

The huge progress of VLSI technology enables the integration of millions of transistor on a single chip called System on chip (SoC).The SoC uses AMBA (Advanced Microcontroller Bus Architecture) as on chip bus protocol. AMBA’s specifications define five buses/interfaces: Advanced extensible Interface (AXI), Advanced High-performance Bus (AHB), Advanced System Bus (ASB), Advanced Trace Bus (ATB), and Advanced Peripheral Bus (APB). AXI, AHB, ASB, ATB which are high performance buses used to interface High speed Processor with DMA devices, ROM, on chip RAM etc. Whereas APB is low performance, low peripheral bandwidth bus and is used to connect with slaves like UART (Universal Asynchronous Receiver-Transmitter), Timer, Keypad and Interrupt Controller etc. In this work the design of APB for UART is designed to communicate data between SoC functional blocks with external input output peripherals.